00001 /*! \file WaspACC.h 00002 \brief Library for managing the accelerometer LIS3LV02DL 00003 00004 Copyright (C) 2009 Libelium Comunicaciones Distribuidas S.L. 00005 http://www.libelium.com 00006 00007 This program is free software: you can redistribute it and/or modify 00008 it under the terms of the GNU Lesser General Public License as published by 00009 the Free Software Foundation, either version 2.1 of the License, or 00010 (at your option) any later version. 00011 00012 This program is distributed in the hope that it will be useful, 00013 but WITHOUT ANY WARRANTY; without even the implied warranty of 00014 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 00015 GNU Lesser General Public License for more details. 00016 00017 You should have received a copy of the GNU Lesser General Public License 00018 along with this program. If not, see <http://www.gnu.org/licenses/>. 00019 00020 Version: 0.6 00021 00022 Design: David Gascón 00023 00024 Implementation: David Cuartielles, Alberto Bielsa 00025 00026 */ 00027 00028 00029 /*! \def WaspACC_h 00030 \brief The library flag 00031 00032 */ 00033 #ifndef WaspACC_h 00034 #define WaspACC_h 00035 00036 /****************************************************************************** 00037 * Includes 00038 ******************************************************************************/ 00039 00040 #include <inttypes.h> 00041 00042 /****************************************************************************** 00043 * Definitions & Declarations 00044 ******************************************************************************/ 00045 00046 /*! \def i2cID 00047 \brief sensor's address on the I2C port 00048 */ 00049 #define i2cID 0x1D 00050 00051 /*! \def cbi 00052 \brief Function definition to set a register bit to '0' 00053 00054 'sfr' is the register. 'bit' is the register bit to change 00055 */ 00056 #ifndef cbi 00057 #define cbi(sfr, bit) (_SFR_BYTE(sfr) &= ~_BV(bit)) 00058 #endif 00059 00060 /*! \def sbi 00061 \brief Function definition to set a register bit to '1' 00062 00063 'sfr' is the register. 'bit' is the register bit to change 00064 */ 00065 #ifndef sbi 00066 #define sbi(sfr, bit) (_SFR_BYTE(sfr) |= _BV(bit)) 00067 #endif 00068 00069 /*! \def outXlow 00070 \brief X axis acceleration register lower bits address 00071 00072 Data is stored either as signed 12-bit or unsigned 16-bit numbers 00073 */ 00074 #define outXlow 0x28 00075 00076 /*! \def outXhigh 00077 \brief X axis acceleration register higher bits address 00078 00079 Data is stored either as signed 12-bit or unsigned 16-bit numbers 00080 */ 00081 #define outXhigh 0x29 00082 00083 /*! \def outYlow 00084 \brief Y axis acceleration register lower bits address 00085 00086 Data is stored either as signed 12-bit or unsigned 16-bit numbers 00087 */ 00088 #define outYlow 0x2A 00089 00090 /*! \def outYhigh 00091 \brief Y axis acceleration register higher bits address 00092 00093 Data is stored either as signed 12-bit or unsigned 16-bit numbers 00094 */ 00095 #define outYhigh 0x2B 00096 00097 /*! \def outZlow 00098 \brief Z axis acceleration register lower bits address 00099 00100 Data is stored either as signed 12-bit or unsigned 16-bit numbers 00101 */ 00102 #define outZlow 0x2C 00103 00104 /*! \def outZhigh 00105 \brief Z axis acceleration register higher bits address 00106 00107 Data is stored either as signed 12-bit or unsigned 16-bit numbers 00108 */ 00109 #define outZhigh 0x2D 00110 00111 /*! \def ctrlReg1 00112 \brief Control Register 1 Address 00113 00114 This register contains configuration parameters as powering accelerometer or enabling the different axis 00115 */ 00116 #define ctrlReg1 0x20 00117 00118 /*! \def ctrlReg2 00119 \brief Control Register 2 Address 00120 00121 This register contains configuration parameters as enabling interruptions or data type 00122 */ 00123 #define ctrlReg2 0x21 00124 00125 /*! \def ctrlReg3 00126 \brief Control Register 3 Address 00127 00128 This register contains configuration parameters related with high-pass filter 00129 */ 00130 #define ctrlReg3 0x22 00131 00132 /*! \def HP_FILTER_RESET 00133 \brief High Pass Filter Register Address 00134 00135 Dummy register. Reading at this address zeroes instantaneously the content of the internal high pass-filter. Read data is not significant. 00136 */ 00137 #define HP_FILTER_RESET 0x23 00138 00139 /*! \def statusReg 00140 \brief Status Register Address 00141 00142 This register contains '0' if accelerometer is stopped and '1' if it is running 00143 */ 00144 #define statusReg 0x27 00145 00146 /*! \def whoAmIReg 00147 \brief Who Am I Register Address 00148 00149 This register will contain '0x3A' if accelerometer is properly working. Other value means a bad accelerometer behavior 00150 */ 00151 #define whoAmIReg 0x0F 00152 00153 00154 /*! \def FF_WU_CFG 00155 \brief Free Fall Interrupt Configuration Register 00156 00157 This register specifies the axis enabled to generate an interruption 00158 */ 00159 #define FF_WU_CFG 0x30 00160 00161 /*! \def FF_WU_SRC 00162 \brief Free Fall Interrupt Source Register 00163 00164 This register specifies the axis in which the interruption was generated 00165 */ 00166 #define FF_WU_SRC 0x31 00167 00168 /*! \def FF_WU_ACK 00169 \brief Free Fall Interrupt ACK Register 00170 00171 Dummy register. If LIR bit in FF_WU_CFG register is set to ‘1’, a reading at this address allows the FF_WU_SRC register refresh. Read data is not significant. 00172 */ 00173 #define FF_WU_ACK 0x32 00174 00175 /*! \def FF_WU_THS_L 00176 \brief Free Fall Interrupt Threshold LSB 00177 00178 This register specifies the threshold less significant bits 00179 */ 00180 #define FF_WU_THS_L 0x34 00181 00182 /*! \def FF_WU_THS_H 00183 \brief Free Fall Interrupt Threshold MSB 00184 00185 This register specifies the threshold most significant bits 00186 */ 00187 #define FF_WU_THS_H 0x35 00188 00189 /*! \def FF_WU_DURATION 00190 \brief Free Fall Interrupt Duration 00191 00192 This register sets the minimum duration of the free-fall/wake-up event to be recognized. 00193 */ 00194 #define FF_WU_DURATION 0x36 00195 00196 /*! \def DD_CFG 00197 \brief Direction Change Interrupt Configuration Register 00198 00199 This register specifies the axis enabled to generate an interruption 00200 */ 00201 #define DD_CFG 0x38 00202 00203 /*! \def DD_SRC 00204 \brief Direction Change Interrupt Source Register 00205 00206 This register specifies the axis in which the interruption was generated 00207 */ 00208 #define DD_SRC 0x39 00209 00210 00211 /*! \def DD_ACK 00212 \brief Direction Change Interrupt ACK Register 00213 00214 Dummy register. If LIR bit in DD_CFG register is set to ‘1’, a reading at this address allows the DD_SRC register refresh. Read data is not significant. 00215 */ 00216 #define DD_ACK 0x3A 00217 00218 /*! \def DD_THSI_L 00219 \brief Direction Change Interrupt Internal Threshold LSB 00220 00221 This register specifies the internal threshold less significant bits 00222 */ 00223 #define DD_THSI_L 0x3C 00224 00225 /*! \def DD_THSI_H 00226 \brief Direction Change Interrupt Internal Threshold MSB 00227 00228 This register specifies the internal threshold most significant bits 00229 */ 00230 #define DD_THSI_H 0x3D 00231 00232 /*! \def DD_THSE_L 00233 \brief Direction Change Interrupt External Threshold LSB 00234 00235 This register specifies the external threshold less significant bits 00236 */ 00237 #define DD_THSE_L 0x3E 00238 00239 /*! \def DD_THSE_H 00240 \brief Direction Change Interrupt External Threshold MSB 00241 00242 This register specifies the external threshold most significant bits 00243 */ 00244 #define DD_THSE_H 0x3F 00245 00246 /*! \def AOI 00247 \brief AND/OR Combination of interrupt events 00248 00249 This bit is contained in FF_WU_CFG. '1' is AND combination, '0' is OR combination 00250 */ 00251 #define AOI 128 00252 00253 /*! \def IEND 00254 \brief Direction Change Interrupt Enable 00255 00256 This bit is contained in DD_CFG. '1' enables interruptions, '0' disables interruptions 00257 */ 00258 #define IEND 128 00259 00260 /*! \def LIR 00261 \brief Latch Interrupt 00262 00263 This bit is contained in DD_CFG and FF_WU_CFG. '1' interrupt request latched, '0' interrupt request not latched 00264 */ 00265 #define LIR 64 00266 00267 /*! \def IA 00268 \brief Interrupt Active 00269 00270 This bit is contained in DD_SRC and FF_WU_SRC. '1' indicates interrupts have been generated, '0' indicates no interruptions have been generated 00271 */ 00272 #define IA 64 00273 00274 /*! \def ZHIE 00275 \brief Z High event interruption 00276 00277 This bit is contained in FF_WU_CFG. '1' enables Z High event interruption 00278 */ 00279 #define ZHIE 32 00280 00281 /*! \def ZLIE 00282 \brief Z Low event interruption 00283 00284 This bit is contained in FF_WU_CFG. '1' enables Z Low event interruption 00285 */ 00286 #define ZLIE 16 00287 00288 /*! \def YHIE 00289 \brief Y High event interruption 00290 00291 This bit is contained in FF_WU_CFG. '1' enables Y High event interruption 00292 */ 00293 #define YHIE 8 00294 00295 /*! \def YLIE 00296 \brief Y Low event interruption 00297 00298 This bit is contained in FF_WU_CFG. '1' enables Y Low event interruption 00299 */ 00300 #define YLIE 4 00301 00302 /*! \def XHIE 00303 \brief X High event interruption 00304 00305 This bit is contained in FF_WU_CFG. '1' enables X High event interruption 00306 */ 00307 #define XHIE 2 00308 00309 /*! \def XLIE 00310 \brief X Low event interruption 00311 00312 This bit is contained in FF_WU_CFG. '1' enables X Low event interruption 00313 */ 00314 #define XLIE 1 00315 00316 00317 /*! \def FF_WU_CFG_val 00318 \brief Free Fall Configuration 00319 00320 Free Fall Interruption Configuration, setting interrupt latched and Z,Y,X High event 00321 */ 00322 #define FF_WU_CFG_val LIR | ZHIE | YHIE | XHIE 00323 00324 /*! \def FF_WU_THS_L_val 00325 \brief Free Fall Threshold LSB 00326 00327 Free Fall Threshold LSB. '0x3C00' is a good experimental value for 1g. This value should be changed in different applications 00328 */ 00329 #define FF_WU_THS_L_val 0x00 00330 00331 /*! \def FF_WU_THS_H_val 00332 \brief Free Fall Threshold MSB 00333 00334 Free Fall Threshold MSB. '0x3C00' is a good experimental value for 1g. This value should be changed in different applications 00335 */ 00336 #define FF_WU_THS_H_val 0x4B 00337 00338 /*! \def FF_WU_DURATION_val 00339 \brief Free Fall Duration 00340 00341 Free Fall Duration. Empirically tested to be a good duration 00342 */ 00343 #define FF_WU_DURATION_val 0x05 00344 00345 /*! \def DD_CFG_val 00346 \brief Direction Change Configuration 00347 00348 Direction Change Interruption Configuration, setting interrupt enabled,interrupt latched and Y and X High and Low events 00349 */ 00350 #define DD_CFG_val IEND | LIR | YHIE | YLIE | XHIE | XLIE 00351 00352 /*! \def DD_THSI_L_val 00353 \brief Direction Change Internal Threshold LSB 00354 00355 Direction Change Internal Threshold LSB. 00356 */ 00357 #define DD_THSI_L_val 0x00 00358 00359 /*! \def DD_THSI_H_val 00360 \brief Direction Change Internal Threshold MSB 00361 00362 Direction Change Internal Threshold MSB. 00363 */ 00364 #define DD_THSI_H_val 0x30 00365 00366 /*! \def DD_THSE_L_val 00367 \brief Direction Change External Threshold LSB 00368 00369 Direction Change External Threshold LSB. 00370 */ 00371 #define DD_THSE_L_val 0x00 00372 00373 /*! \def DD_THSE_H_val 00374 \brief Direction Change External Threshold MSB 00375 00376 Direction Change External Threshold MSB. 00377 */ 00378 #define DD_THSE_H_val 0x3C 00379 00380 /*! \def SIGNED_12_BITS 00381 \brief Accelerometer ADC modes. Signed 12 bits in this case 00382 00383 This is the DAS bit in the CTRL2 register 00384 */ 00385 #define SIGNED_12_BITS 0 00386 00387 /*! \def UNSIGNED_16_BITS 00388 \brief Accelerometer ADC modes. Unsigned 16 bits in this case 00389 00390 This is the DAS bit in the CTRL2 register 00391 */ 00392 #define UNSIGNED_16_BITS 1 00393 00394 00395 /*! \def ACC_HIBERNATE 00396 \brief Accelerometer Operation modes. Hibernate in this case 00397 */ 00398 #define ACC_HIBERNATE 1 00399 00400 /*! \def ACC_ON 00401 \brief Accelerometer Operation modes. ON in this case 00402 */ 00403 #define ACC_ON 2 00404 00405 /*! \def ACC_CUSTOM 00406 \brief Accelerometer Operation modes. Custom mode in this case 00407 */ 00408 #define ACC_CUSTOM 4 00409 00410 /*! \def ACC_NONE 00411 \brief Accelerometer event types. None in this case 00412 00413 These events don't need to be excluding each other. It is possible to monitor continuous movement and free-fall situations at once 00414 */ 00415 #define ACC_NONE 0 00416 00417 /*! \def ACC_FREE_FALL 00418 \brief Accelerometer event types. Free Fall in this case 00419 00420 These events don't need to be excluding each other. It is possible to monitor continuous movement and free-fall situations at once 00421 */ 00422 #define ACC_FREE_FALL 1 00423 00424 /*! \def ACC_DIRECTION 00425 \brief Accelerometer event types. Direction Change in this case 00426 00427 These events don't need to be excluding each other. It is possible to monitor continuous movement and free-fall situations at once 00428 */ 00429 #define ACC_DIRECTION 2 00430 00431 /*! \def ACC_THRESHOLD 00432 \brief Accelerometer event types. Threshold in this case 00433 00434 These events don't need to be excluding each other. It is possible to monitor continuous movement and free-fall situations at once 00435 */ 00436 #define ACC_THRESHOLD 4 00437 00438 /*! \def ACC_ERROR_READING 00439 \brief Flag values. Error reading register in this case 00440 */ 00441 #define ACC_ERROR_READING 1 00442 00443 /*! \def ACC_ERROR_READING 00444 \brief Flag values. Error writing register in this case 00445 */ 00446 #define ACC_ERROR_WRITING 2 00447 00448 /*! \def ACC_RATE_40 00449 \brief 40Hz Sampling Rate 00450 */ 00451 #define ACC_RATE_40 0 00452 00453 /*! \def ACC_RATE_160 00454 \brief 160Hz Sampling Rate 00455 */ 00456 #define ACC_RATE_160 1 00457 00458 /*! \def ACC_RATE_640 00459 \brief 640Hz Sampling Rate 00460 */ 00461 #define ACC_RATE_640 2 00462 00463 /*! \def ACC_RATE_2560 00464 \brief 2560Hz Sampling Rate 00465 */ 00466 #define ACC_RATE_2560 4 00467 00468 /****************************************************************************** 00469 * Class 00470 ******************************************************************************/ 00471 00472 //! WaspACC Class 00473 /*! 00474 WaspACC Class defines all the variables and functions used to manage LIS3LV02DL accelerometer 00475 */ 00476 class WaspACC 00477 { 00478 private: 00479 00480 //! Variable : Accelerometer Operation Mode 00481 /*! 00482 Possible values are ACC_ON, ACC_HIBERNATE and ACC_CUSTOM 00483 */ 00484 uint8_t accMode; 00485 00486 //! Variable : Accelerometer Event Mode 00487 /*! 00488 Possible values are ACC_NONE, ACC_FREE_FALL, ACC_DIRECTION, ACC_THRESHOLD 00489 */ 00490 uint8_t AccEventMode; 00491 00492 public: 00493 00494 //! class constructor 00495 /*! 00496 It does nothing 00497 \param void 00498 \return void 00499 */ 00500 WaspACC(); 00501 00502 //! Variable : status flag, used to see if there has been an error while reading/writing or if there has been a hardware interrupt 00503 /*! 00504 Possible values are ACC_ERROR_READING or ACC_ERROR_WRITING 00505 */ 00506 volatile uint8_t flag; 00507 00508 //! Variable : interrupt flag, used to check which interrupt got active 00509 /*! 00510 Its structure is: 00511 (MSB) 7 6 5 4 3 2 1 0 (LSB) 00512 XX XX XX XX XX TH DD FF 00513 TH - threshold, DD - direction change, FF - free fall 00514 */ 00515 uint8_t flagInt; 00516 00517 //! It opens I2C bus and powers the accelerometer 00518 /*! 00519 \param void 00520 \return void 00521 \sa boot(), close(), begin() 00522 */ 00523 void ON(); 00524 00525 //! It opens I2C bus 00526 /*! 00527 \param void 00528 \return void 00529 \sa boot(), close() 00530 */ 00531 void begin(); 00532 00533 //! It reboots the accelerometer 00534 /*! 00535 \param void 00536 \return void 00537 \sa init(), close() 00538 */ 00539 void boot(); 00540 00541 //! It closes I2C bus 00542 /*! 00543 \param void 00544 \return void 00545 \sa init(), boot() 00546 */ 00547 void close(); 00548 00549 //! It gets the accelerometer status 00550 /*! 00551 \param void 00552 \return a byte containing the accelerometer status as read from the proper register. It won't activate any flags by itself, but activates ACC_COMM_ERROR in case there was an error writing to the register 00553 \sa check() 00554 */ 00555 uint8_t getStatus(); 00556 00557 //! It checks if accelerometer is working properly 00558 /*! 00559 \param void 00560 \return a byte containing the register value. If this value is different from '0x3A', the accelerometer is not working properly 00561 \sa getStatus() 00562 */ 00563 uint8_t check(); 00564 00565 //! It gets the CTRL1 register 00566 /*! 00567 \param void 00568 \return a byte containing the register value. 00569 \sa setCTRL1(uint8_t val) 00570 */ 00571 uint8_t getCTRL1(); 00572 00573 //! It sets the CTRL1 register 00574 /*! 00575 \param uint8_t val : value to set the CTRL1 register to 00576 \return '1' if error 00577 \sa getCTRL1() 00578 */ 00579 uint8_t setCTRL1(uint8_t val); 00580 00581 //! It gets the CTRL2 register 00582 /*! 00583 \param void 00584 \return a byte containing the register value. 00585 \sa setCTRL2(uint8_t val) 00586 */ 00587 uint8_t getCTRL2(); 00588 00589 //! It sets the CTRL2 register 00590 /*! 00591 \param uint8_t val : value to set the CTRL2 register to 00592 \return '1' if error 00593 \sa getCTRL2() 00594 */ 00595 uint8_t setCTRL2(uint8_t val); 00596 00597 //! It gets the CTRL3 register 00598 /*! 00599 \param void 00600 \return a byte containing the register value. 00601 \sa setCTRL3(uint8_t val) 00602 */ 00603 uint8_t getCTRL3(); 00604 00605 //! It sets the CTRL3 register 00606 /*! 00607 \param uint8_t val : value to set the CTRL3 register to 00608 \return '1' if error 00609 \sa getCTRL3() 00610 */ 00611 uint8_t setCTRL3(uint8_t val); 00612 00613 //! It reads a register from the accelerometer 00614 /*! 00615 \param uint8_t address : register address 00616 \return register value or '-1' if error 00617 \sa writeRegister(uint8_t address, uint8_t val) 00618 */ 00619 int16_t readRegister(uint8_t address); 00620 00621 //! It writes a register to the accelerometer 00622 /*! 00623 \param uint8_t address : register address 00624 \param uint8_t val : value to write 00625 \return '0' on success, '-1' if error 00626 \sa readRegister(uint8_t val) 00627 */ 00628 int16_t writeRegister(uint8_t address, uint8_t val); 00629 00630 //! It gets the accelerometer's ADC mode 00631 /*! 00632 \param void 00633 \return '0' for 12 bits right aligned (MSB represents the sign) and '1' for 16 bits left aligned 00634 \sa setADCmode(uint8_t val) 00635 */ 00636 uint8_t getADCmode(); 00637 00638 //! It sets the accelerometer's ADC mode 00639 /*! 00640 \param uint8_t val : '0' for 12 bits right aligned (MSB represents the sign) and '1' for 16 bits left aligned 00641 \return '0' on success, '-1' if error 00642 \sa getADCmode() 00643 */ 00644 uint8_t setADCmode(uint8_t val); 00645 00646 //! It sets the accelerometer's sampling rate 00647 /*! 00648 \param uint8_t rate : ACC_RATE_40, ACC_RATE_160, ACC_RATE_640, ACC_RATE_2560 00649 \return '0' on success, '-1' if error 00650 */ 00651 uint8_t setSamplingRate(uint8_t rate); 00652 00653 //! It gets the acceleration on OX 00654 /*! 00655 \param void 00656 \return the combined contents of data registers outXhigh and outXlow as an integer according to ADC's configuration 00657 \sa getY(), getZ() 00658 */ 00659 int16_t getX(); 00660 00661 //! It gets the acceleration on OY 00662 /*! 00663 \param void 00664 \return the combined contents of data registers outYhigh and outYlow as an integer according to ADC's configuration 00665 \sa getX(), getZ() 00666 */ 00667 int16_t getY(); 00668 00669 //! It gets the acceleration on OZ 00670 /*! 00671 \param void 00672 \return the combined contents of data registers outZhigh and outZlow as an integer according to ADC's configuration 00673 \sa getX(), getY() 00674 */ 00675 int16_t getZ(); 00676 00677 //! It sets the Free Fall interrupt using the parameters previously defined 00678 /*! 00679 \param void 00680 \return 'flag' variable 00681 \sa unsetFF() 00682 */ 00683 uint8_t setFF(void); 00684 00685 //! It unsets the Free Fall interrupt 00686 /*! 00687 \param void 00688 \return 'flag' variable 00689 \sa setFF() 00690 */ 00691 uint8_t unsetFF(void); 00692 00693 //! It sets the Direction Change interrupt using the input parameter 00694 /*! 00695 \param uint8_t directions : the axis where enable the interruptions 00696 \return 'flag' variable 00697 \sa setDD() 00698 */ 00699 uint8_t setDD(uint8_t directions); 00700 00701 //! It sets the Direction Change interrupt using the parameters previously defined 00702 /*! 00703 \param void 00704 \return 'flag' variable 00705 \sa setDD(uint8_t directions) 00706 */ 00707 uint8_t setDD(void) { setDD(DD_CFG_val); return flag; } 00708 00709 //! It unsets the Direction Change interrupt 00710 /*! 00711 \param void 00712 \return 'flag' variable 00713 \sa setFF() 00714 */ 00715 uint8_t unsetDD(void); 00716 00717 //! It gets the accelerometer's work mode 00718 /*! 00719 \param void 00720 \return 'accMode' variable 00721 \sa setMode(uint8_t val) 00722 */ 00723 uint8_t getMode(); 00724 00725 //! It sets the accelerometer's work mode 00726 /*! 00727 \param uint8_t val : the accelerometer's work mode (ACC_ON, ACC_HIBERNATE, ACC_CUSTOM) 00728 \return '0' if no error 00729 \sa getMode() 00730 */ 00731 uint8_t setMode(uint8_t val); 00732 00733 //! It gets the accelerometer's event type 00734 /*! 00735 \param void 00736 \return 'AccEventMode' variable 00737 \sa setAccEvent(uint8_t val) 00738 */ 00739 uint8_t getAccEvent(); 00740 00741 //! It sets the accelerometer's event type 00742 /*! 00743 \param uint8_t val : accelerometer's event type (ACC_NONE, ACC_FREE_FALL, ACC_DIRECTION, ACC_THRESHOLD) 00744 \return '0' if no error 00745 \sa getMode() 00746 */ 00747 uint8_t setAccEvent(uint8_t val); 00748 00749 //! It configures the specific hardware interrupt for the acc 00750 /*! 00751 \param void 00752 \return void 00753 \sa detachInt() 00754 */ 00755 void attachInt(void); 00756 00757 //! It unsets the specific hardware interrupt for the acc 00758 /*! 00759 \param void 00760 \return void 00761 \sa attachInt() 00762 */ 00763 void detachInt(void); 00764 00765 //! It clears the Accelerometer's alarm flag 00766 /*! 00767 \param void 00768 \return void 00769 */ 00770 void clearAlarmFlag(); 00771 }; 00772 00773 extern WaspACC ACC; 00774 00775 #endif 00776
1.5.6