WaspACC.h File Reference

Library for managing the accelerometer LIS3LV02DL. More...

#include <inttypes.h>

Include dependency graph for WaspACC.h:

Go to the source code of this file.

Data Structures

class WaspACC

WaspACC Class. More...

Defines

#define i2cID   0x1D

sensor's address on the I2C port

#define cbi(sfr, bit)   (_SFR_BYTE(sfr) &= ~_BV(bit))

Function definition to set a register bit to '0'.

#define sbi(sfr, bit)   (_SFR_BYTE(sfr) |= _BV(bit))

Function definition to set a register bit to '1'.

#define outXlow   0x28

X axis acceleration register lower bits address.

#define outXhigh   0x29

X axis acceleration register higher bits address.

#define outYlow   0x2A

Y axis acceleration register lower bits address.

#define outYhigh   0x2B

Y axis acceleration register higher bits address.

#define outZlow   0x2C

Z axis acceleration register lower bits address.

#define outZhigh   0x2D

Z axis acceleration register higher bits address.

#define ctrlReg1   0x20

Control Register 1 Address.

#define ctrlReg2   0x21

Control Register 2 Address.

#define ctrlReg3   0x22

Control Register 3 Address.

#define HP_FILTER_RESET   0x23

High Pass Filter Register Address.

#define statusReg   0x27

Status Register Address.

#define whoAmIReg   0x0F

Who Am I Register Address.

#define FF_WU_CFG   0x30

Free Fall Interrupt Configuration Register.

#define FF_WU_SRC   0x31

Free Fall Interrupt Source Register.

#define FF_WU_ACK   0x32

Free Fall Interrupt ACK Register.

#define FF_WU_THS_L   0x34

Free Fall Interrupt Threshold LSB.

#define FF_WU_THS_H   0x35

Free Fall Interrupt Threshold MSB.

#define FF_WU_DURATION   0x36

Free Fall Interrupt Duration.

#define DD_CFG   0x38

Direction Change Interrupt Configuration Register.

#define DD_SRC   0x39

Direction Change Interrupt Source Register.

#define DD_ACK   0x3A

Direction Change Interrupt ACK Register.

#define DD_THSI_L   0x3C

Direction Change Interrupt Internal Threshold LSB.

#define DD_THSI_H   0x3D

Direction Change Interrupt Internal Threshold MSB.

#define DD_THSE_L   0x3E

Direction Change Interrupt External Threshold LSB.

#define DD_THSE_H   0x3F

Direction Change Interrupt External Threshold MSB.

#define AOI   128

AND/OR Combination of interrupt events.

#define IEND   128

Direction Change Interrupt Enable.

#define LIR   64

Latch Interrupt.

#define IA   64

Interrupt Active.

#define ZHIE   32

Z High event interruption.

#define ZLIE   16

Z Low event interruption.

#define YHIE   8

Y High event interruption.

#define YLIE   4

Y Low event interruption.

#define XHIE   2

X High event interruption.

#define XLIE   1

X Low event interruption.

#define FF_WU_CFG_val   LIR | ZHIE | YHIE | XHIE

Free Fall Configuration.

#define FF_WU_THS_L_val   0x00

Free Fall Threshold LSB.

#define FF_WU_THS_H_val   0x4B

Free Fall Threshold MSB.

#define FF_WU_DURATION_val   0x05

Free Fall Duration.

#define DD_CFG_val   IEND | LIR | YHIE | YLIE | XHIE | XLIE

Direction Change Configuration.

#define DD_THSI_L_val   0x00

Direction Change Internal Threshold LSB.

#define DD_THSI_H_val   0x30

Direction Change Internal Threshold MSB.

#define DD_THSE_L_val   0x00

Direction Change External Threshold LSB.

#define DD_THSE_H_val   0x3C

Direction Change External Threshold MSB.

#define SIGNED_12_BITS   0

Accelerometer ADC modes. Signed 12 bits in this case.

#define UNSIGNED_16_BITS   1

Accelerometer ADC modes. Unsigned 16 bits in this case.

#define ACC_HIBERNATE   1

Accelerometer Operation modes. Hibernate in this case.

#define ACC_ON   2

Accelerometer Operation modes. ON in this case.

#define ACC_CUSTOM   4

Accelerometer Operation modes. Custom mode in this case.

#define ACC_NONE   0

Accelerometer event types. None in this case.

#define ACC_FREE_FALL   1

Accelerometer event types. Free Fall in this case.

#define ACC_DIRECTION   2

Accelerometer event types. Direction Change in this case.

#define ACC_THRESHOLD   4

Accelerometer event types. Threshold in this case.

#define ACC_ERROR_READING   1

Flag values. Error reading register in this case.

#define ACC_ERROR_WRITING   2

#define ACC_RATE_40   0

40Hz Sampling Rate

#define ACC_RATE_160   1

160Hz Sampling Rate

#define ACC_RATE_640   2

640Hz Sampling Rate

#define ACC_RATE_2560   4

2560Hz Sampling Rate

Variables

WaspACC ACC

Detailed Description

Library for managing the accelerometer LIS3LV02DL.

This program is free software: you can redistribute it and/or modify it under the terms of the GNU Lesser General Public License as published by the Free Software Foundation, either version 2.1 of the License, or (at your option) any later version.

This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public License for more details.

You should have received a copy of the GNU Lesser General Public License along with this program. If not, see <http://www.gnu.org/licenses/>.

Version: 0.6

Design: David Gascón

Implementation: David Cuartielles, Alberto Bielsa

Definition in file WaspACC.h.

Define Documentation

#define ACC_CUSTOM 4

Accelerometer Operation modes. Custom mode in this case.

Definition at line 408 of file WaspACC.h.

Referenced by WaspACC::setMode().

#define ACC_DIRECTION 2

Accelerometer event types. Direction Change in this case.

These events don't need to be excluding each other. It is possible to monitor continuous movement and free-fall situations at once

Definition at line 429 of file WaspACC.h.

Referenced by WaspACC::setAccEvent(), WaspACC::setDD(), and WaspACC::unsetDD().

#define ACC_ERROR_READING 1

Flag values. Error reading register in this case.

Flag values. Error writing register in this case.

Referenced by WaspACC::readRegister().

#define ACC_ERROR_WRITING 2

Definition at line 446 of file WaspACC.h.

Referenced by WaspACC::writeRegister().

#define ACC_FREE_FALL 1

Accelerometer event types. Free Fall in this case.

These events don't need to be excluding each other. It is possible to monitor continuous movement and free-fall situations at once

Definition at line 422 of file WaspACC.h.

Referenced by WaspACC::setAccEvent(), WaspACC::setFF(), and WaspACC::unsetFF().

#define ACC_HIBERNATE 1

Accelerometer Operation modes. Hibernate in this case.

Definition at line 398 of file WaspACC.h.

Referenced by WaspACC::close(), and WaspACC::setMode().

#define ACC_NONE 0

Accelerometer event types. None in this case.

These events don't need to be excluding each other. It is possible to monitor continuous movement and free-fall situations at once

Definition at line 415 of file WaspACC.h.

Referenced by WaspACC::setAccEvent().

#define ACC_ON 2

Accelerometer Operation modes. ON in this case.

Definition at line 403 of file WaspACC.h.

Referenced by WaspACC::begin(), WaspACC::ON(), and WaspACC::setMode().

#define ACC_RATE_160 1

160Hz Sampling Rate

Definition at line 456 of file WaspACC.h.

Referenced by WaspACC::setSamplingRate().

#define ACC_RATE_2560 4

2560Hz Sampling Rate

Definition at line 466 of file WaspACC.h.

Referenced by WaspACC::setSamplingRate().

#define ACC_RATE_40 0

40Hz Sampling Rate

Definition at line 451 of file WaspACC.h.

Referenced by WaspACC::setSamplingRate().

#define ACC_RATE_640 2

640Hz Sampling Rate

Definition at line 461 of file WaspACC.h.

Referenced by WaspACC::setSamplingRate().

#define ACC_THRESHOLD 4

Accelerometer event types. Threshold in this case.

These events don't need to be excluding each other. It is possible to monitor continuous movement and free-fall situations at once

Definition at line 436 of file WaspACC.h.

#define AOI 128

AND/OR Combination of interrupt events.

This bit is contained in FF_WU_CFG. '1' is AND combination, '0' is OR combination

Definition at line 251 of file WaspACC.h.

#define cbi	(	sfr,
		bit		)	(_SFR_BYTE(sfr) &= ~_BV(bit))

Function definition to set a register bit to '0'.

'sfr' is the register. 'bit' is the register bit to change

Definition at line 57 of file WaspACC.h.

#define ctrlReg1 0x20

Control Register 1 Address.

This register contains configuration parameters as powering accelerometer or enabling the different axis

Definition at line 116 of file WaspACC.h.

Referenced by WaspACC::getCTRL1(), WaspACC::setCTRL1(), WaspACC::setDD(), WaspACC::setFF(), WaspACC::setMode(), and WaspACC::setSamplingRate().

#define ctrlReg2 0x21

Control Register 2 Address.

This register contains configuration parameters as enabling interruptions or data type

Definition at line 123 of file WaspACC.h.

Referenced by WaspACC::boot(), WaspACC::getADCmode(), WaspACC::getCTRL2(), WaspACC::setADCmode(), WaspACC::setCTRL2(), WaspACC::setDD(), WaspACC::setFF(), and WaspACC::setMode().

#define ctrlReg3 0x22

Control Register 3 Address.

This register contains configuration parameters related with high-pass filter

Definition at line 130 of file WaspACC.h.

Referenced by WaspACC::getCTRL3(), WaspACC::setCTRL3(), WaspACC::setDD(), WaspACC::setFF(), and WaspACC::setMode().

#define DD_ACK 0x3A

Direction Change Interrupt ACK Register.

Dummy register. If LIR bit in DD_CFG register is set to ‘1’, a reading at this address allows the DD_SRC register refresh. Read data is not significant.

Definition at line 216 of file WaspACC.h.

Referenced by WaspACC::clearAlarmFlag(), and WaspACC::unsetDD().

#define DD_CFG 0x38

Direction Change Interrupt Configuration Register.

This register specifies the axis enabled to generate an interruption

Definition at line 201 of file WaspACC.h.

Referenced by WaspACC::clearAlarmFlag(), WaspACC::setDD(), and WaspACC::unsetDD().

Direction Change Configuration.

Direction Change Interruption Configuration, setting interrupt enabled,interrupt latched and Y and X High and Low events

Definition at line 350 of file WaspACC.h.

Referenced by WaspACC::setDD().

#define DD_SRC 0x39

Direction Change Interrupt Source Register.

This register specifies the axis in which the interruption was generated

Definition at line 208 of file WaspACC.h.

#define DD_THSE_H 0x3F

Direction Change Interrupt External Threshold MSB.

This register specifies the external threshold most significant bits

Definition at line 244 of file WaspACC.h.

Referenced by WaspACC::setDD().

#define DD_THSE_H_val 0x3C

Direction Change External Threshold MSB.

Definition at line 378 of file WaspACC.h.

Referenced by WaspACC::setDD().

#define DD_THSE_L 0x3E

Direction Change Interrupt External Threshold LSB.

This register specifies the external threshold less significant bits

Definition at line 237 of file WaspACC.h.

Referenced by WaspACC::setDD().

#define DD_THSE_L_val 0x00

Direction Change External Threshold LSB.

Definition at line 371 of file WaspACC.h.

Referenced by WaspACC::setDD().

#define DD_THSI_H 0x3D

Direction Change Interrupt Internal Threshold MSB.

This register specifies the internal threshold most significant bits

Definition at line 230 of file WaspACC.h.

Referenced by WaspACC::setDD().

#define DD_THSI_H_val 0x30

Direction Change Internal Threshold MSB.

Definition at line 364 of file WaspACC.h.

Referenced by WaspACC::setDD().

#define DD_THSI_L 0x3C

Direction Change Interrupt Internal Threshold LSB.

This register specifies the internal threshold less significant bits

Definition at line 223 of file WaspACC.h.

Referenced by WaspACC::setDD().

#define DD_THSI_L_val 0x00

Direction Change Internal Threshold LSB.

Definition at line 357 of file WaspACC.h.

Referenced by WaspACC::setDD().

#define FF_WU_ACK 0x32

Free Fall Interrupt ACK Register.

Dummy register. If LIR bit in FF_WU_CFG register is set to ‘1’, a reading at this address allows the FF_WU_SRC register refresh. Read data is not significant.

Definition at line 173 of file WaspACC.h.

Referenced by WaspACC::clearAlarmFlag(), and WaspACC::unsetFF().

#define FF_WU_CFG 0x30

Free Fall Interrupt Configuration Register.

This register specifies the axis enabled to generate an interruption

Definition at line 159 of file WaspACC.h.

Referenced by WaspACC::clearAlarmFlag(), WaspACC::setFF(), and WaspACC::unsetFF().

#define FF_WU_CFG_val LIR | ZHIE | YHIE | XHIE

Free Fall Configuration.

Free Fall Interruption Configuration, setting interrupt latched and Z,Y,X High event

Definition at line 322 of file WaspACC.h.

Referenced by WaspACC::setFF().

#define FF_WU_DURATION 0x36

Free Fall Interrupt Duration.

This register sets the minimum duration of the free-fall/wake-up event to be recognized.

Definition at line 194 of file WaspACC.h.

Referenced by WaspACC::setFF().

#define FF_WU_DURATION_val 0x05

Free Fall Duration.

Free Fall Duration. Empirically tested to be a good duration

Definition at line 343 of file WaspACC.h.

Referenced by WaspACC::setFF().

#define FF_WU_SRC 0x31

Free Fall Interrupt Source Register.

This register specifies the axis in which the interruption was generated

Definition at line 166 of file WaspACC.h.

#define FF_WU_THS_H 0x35

Free Fall Interrupt Threshold MSB.

This register specifies the threshold most significant bits

Definition at line 187 of file WaspACC.h.

Referenced by WaspACC::setFF().

#define FF_WU_THS_H_val 0x4B

Free Fall Threshold MSB.

Free Fall Threshold MSB. '0x3C00' is a good experimental value for 1g. This value should be changed in different applications

Definition at line 336 of file WaspACC.h.

Referenced by WaspACC::setFF().

#define FF_WU_THS_L 0x34

Free Fall Interrupt Threshold LSB.

This register specifies the threshold less significant bits

Definition at line 180 of file WaspACC.h.

Referenced by WaspACC::setFF().

#define FF_WU_THS_L_val 0x00

Free Fall Threshold LSB.

Free Fall Threshold LSB. '0x3C00' is a good experimental value for 1g. This value should be changed in different applications

Definition at line 329 of file WaspACC.h.

Referenced by WaspACC::setFF().

#define HP_FILTER_RESET 0x23

High Pass Filter Register Address.

Dummy register. Reading at this address zeroes instantaneously the content of the internal high pass-filter. Read data is not significant.

Definition at line 137 of file WaspACC.h.

Referenced by WaspACC::setDD().

#define i2cID 0x1D

sensor's address on the I2C port

Definition at line 49 of file WaspACC.h.

Referenced by WaspACC::readRegister(), and WaspACC::writeRegister().

#define IA 64

Interrupt Active.

This bit is contained in DD_SRC and FF_WU_SRC. '1' indicates interrupts have been generated, '0' indicates no interruptions have been generated

Definition at line 272 of file WaspACC.h.

#define IEND 128

Direction Change Interrupt Enable.

This bit is contained in DD_CFG. '1' enables interruptions, '0' disables interruptions

Definition at line 258 of file WaspACC.h.

Referenced by WaspACC::setDD().

#define LIR 64

Latch Interrupt.

This bit is contained in DD_CFG and FF_WU_CFG. '1' interrupt request latched, '0' interrupt request not latched

Definition at line 265 of file WaspACC.h.

Referenced by WaspACC::setDD().

#define outXhigh 0x29

X axis acceleration register higher bits address.